From 94a8fbcbaae95df08d11b6dd763a7e820d134a19 Mon Sep 17 00:00:00 2001 From: Jake <jake.read@cba.mit.edu> Date: Sat, 30 Dec 2017 10:56:22 -0500 Subject: [PATCH] starting to breakout libraries, adding fun components - atsamd51, as5047, two h-bridges, some motor drivers, directfets, etc oh my --- eagle/atsam.lbr | 1358 ++++++++++++++++++++++++++++++++ eagle/fab.lbr | 50 +- eagle/motors.lbr | 117 +++ eagle/power.lbr | 1529 ++++++++++++++++++++++++++++++++++++ eagle/sensor.lbr | 465 +++++++++++ eagle/tag-connect-2030.lbr | 468 +++++++++++ eagle/tag-connect-2050.lbr | 343 ++++++++ 7 files changed, 4305 insertions(+), 25 deletions(-) create mode 100644 eagle/atsam.lbr create mode 100644 eagle/motors.lbr create mode 100644 eagle/power.lbr create mode 100644 eagle/sensor.lbr create mode 100644 eagle/tag-connect-2030.lbr create mode 100644 eagle/tag-connect-2050.lbr diff --git a/eagle/atsam.lbr b/eagle/atsam.lbr new file mode 100644 index 0000000..ff552d1 --- /dev/null +++ b/eagle/atsam.lbr @@ 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Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-1.27" y="-2.54" size="1.27" layer="25" rot="R90">>name</text> +<hole x="0" y="0" drill="0.889"/> +<hole x="5.08" y="-1.016" drill="0.889"/> +<hole x="5.08" y="1.016" drill="0.889"/> +<hole x="0" y="2.54" drill="2.3748"/> +<hole x="0" y="-2.54" drill="2.3748"/> +<hole x="3.175" y="-2.54" drill="2.3748"/> +<hole x="3.175" y="2.54" drill="2.3748"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +</package> +<package name="TC2030-MCP-NL"> +<description><B>TAG-CONNECT ICSP Connector</B><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> + +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-0.635" y="1.27" size="1.27" layer="25">>name</text> +<hole x="0" y="0" drill="0.889"/> +<hole x="5.08" y="-1.016" drill="0.889"/> +<hole x="5.08" y="1.016" drill="0.889"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +</package> +<package name="TC2030-MCP-NL-CP"> +<description><B>TAG-CONNECT ICSP Connector</B><I>- with optional copper pads for steel alignment pins</I><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +<B>Note:</B> Suitable Receptacle pins are 0295-0-15-xx-06-xx-10-0 series from <a href="www.mill-max.com">Mill-Max</a><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" 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pin="PD12/SPI0_NPCS2" pad="65"/> +<connect gate="G$1" pin="PD13" pad="62"/> +<connect gate="G$1" pin="PD14" pad="59"/> +<connect gate="G$1" pin="PD15" pad="75"/> +<connect gate="G$1" pin="PD16" pad="56"/> +<connect gate="G$1" pin="PD17" pad="53"/> +<connect gate="G$1" pin="PD18/URXD4" pad="49"/> +<connect gate="G$1" pin="PD19/UTXD4" pad="47"/> +<connect gate="G$1" pin="PD2/PWMC1_PWML1" pad="91"/> +<connect gate="G$1" pin="PD20/SPI0_MISO" pad="45"/> +<connect gate="G$1" pin="PD21/SPI0_MOSI" pad="43"/> +<connect gate="G$1" pin="PD22_SPI0_SPCK" pad="41"/> +<connect gate="G$1" pin="PD24" pad="37"/> +<connect gate="G$1" pin="PD25/URXD2" pad="35"/> +<connect gate="G$1" pin="PD26/UTXD2" pad="36"/> +<connect gate="G$1" pin="PD27/SPI0_NPCS3/TWD2" pad="32"/> +<connect gate="G$1" pin="PD28/URXD3/TWCK2" pad="51"/> +<connect gate="G$1" pin="PD3/PWMC1_PWMH1" pad="89"/> +<connect gate="G$1" pin="PD30/UTXD3" pad="23"/> +<connect gate="G$1" pin="PD31" pad="2"/> +<connect gate="G$1" pin="PD4/PWMC1_PWML2" pad="88"/> +<connect gate="G$1" pin="PD5/PWMC1_PWMH2" pad="87"/> +<connect gate="G$1" pin="PD6/PWMC1_PWML3" pad="85"/> +<connect gate="G$1" pin="PD7/PWMC1_PWMH3" pad="84"/> +<connect gate="G$1" pin="PD8" pad="80"/> +<connect gate="G$1" pin="PD9" pad="78"/> +<connect gate="G$1" pin="TST" pad="60"/> +<connect gate="G$1" pin="USB_DM" pad="94"/> +<connect gate="G$1" pin="USB_DP" pad="95"/> +<connect gate="G$1" pin="VBG" pad="97"/> +<connect gate="G$1" pin="VDDCORE1" pad="18"/> +<connect gate="G$1" pin="VDDCORE2" pad="22"/> +<connect gate="G$1" pin="VDDCORE3" pad="39"/> +<connect gate="G$1" pin="VDDCORE4" pad="76"/> +<connect gate="G$1" pin="VDDIN" pad="5"/> +<connect gate="G$1" pin="VDDIO1" pad="19"/> +<connect gate="G$1" pin="VDDIO2" pad="28"/> +<connect gate="G$1" pin="VDDIO3" pad="68"/> +<connect gate="G$1" pin="VDDIO4" pad="81"/> +<connect gate="G$1" pin="VDDOUT" pad="4"/> +<connect gate="G$1" pin="VDDPLL" pad="86"/> +<connect gate="G$1" pin="VDDPLLUSB" pad="90"/> +<connect gate="G$1" pin="VDDUTMIC" pad="96"/> +<connect gate="G$1" pin="VDDUTMII" pad="93"/> +<connect gate="G$1" pin="VREFN" pad="6"/> +<connect gate="G$1" pin="VREFP" pad="9"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="ATSAMD51"> +<gates> +<gate name="G$1" symbol="ATSAMD51" x="0" y="0"/> +</gates> +<devices> +<device name="QFN64" package="QFN-64-9X9MM"> +<connects> +<connect gate="G$1" pin="GND@1" pad="7"/> +<connect gate="G$1" pin="GND@2" pad="22"/> +<connect gate="G$1" pin="GND@3" pad="33"/> +<connect gate="G$1" pin="GND@4" pad="47"/> +<connect gate="G$1" pin="GND@5" pad="54"/> +<connect gate="G$1" pin="PA00/SER1-0/TC2-0" pad="1"/> +<connect gate="G$1" pin="PA01/SER1-1/TC2-1" pad="2"/> +<connect gate="G$1" pin="PA02/ADC0-1/DAC-0" pad="3"/> +<connect gate="G$1" pin="PA03/ANAREF-VREFA/ADC0-1" pad="4"/> +<connect gate="G$1" pin="PA04/ANAREF-VREFB/ADC0-4/SER0-0/TC0-0" pad="13"/> +<connect gate="G$1" pin="PA05/ADC0-5/DAC-1/SER0-1/TC0-1" pad="14"/> +<connect gate="G$1" pin="PA06/ANAREF-VREFC/ADC0-6/SER0-2/TC1-0" pad="15"/> +<connect gate="G$1" pin="PA07/ADC0-7/SER0-3/TC1-1" pad="16"/> +<connect gate="G$1" pin="PA08/ADC0-8/ADC1-2/SER0-0/SER2-1/TC0-0" pad="17"/> +<connect gate="G$1" pin="PA09/ADC0-9/ADC1-3/SER0-1/SER2-0/TC0-1" pad="18"/> +<connect gate="G$1" pin="PA10/ADC0-10/SER0-2/SER2-2/TC1-0" pad="19"/> +<connect gate="G$1" pin="PA11/ADC0-11/SER0-3/SER2-3/TC1-1" pad="20"/> +<connect gate="G$1" pin="PA12/SER2-0/SER4-1/TC2-0" pad="29"/> +<connect gate="G$1" pin="PA13/SER2-1/SER4-0/TC2-1" pad="30"/> +<connect gate="G$1" pin="PA14/SER2-2/SER4-2/TC3-0" pad="31"/> +<connect gate="G$1" pin="PA15/SER2-3/SER4-3/TC3-1" pad="32"/> +<connect gate="G$1" pin="PA16/SER1-0/SER3-1/TC2-0" pad="35"/> +<connect gate="G$1" pin="PA17/SER1-1/SER3-0/TC2-1" pad="36"/> +<connect gate="G$1" pin="PA18/SER1-2/SER3-2/TC3-0" pad="37"/> +<connect gate="G$1" pin="PA19/SER1-3/SER3-3/TC3-1" pad="38"/> +<connect gate="G$1" pin="PA20/SER5-2/SER3-2/TC7-0" pad="41"/> +<connect gate="G$1" pin="PA21/SER5-3/SER3-3/TC7-1" pad="42"/> +<connect gate="G$1" pin="PA22/SER3-0/SER5-1/TC4-0" pad="43"/> +<connect gate="G$1" pin="PA23/SER3-1/SER5-0/TC4-1" pad="44"/> +<connect gate="G$1" pin="PA24/SER3-2/SER5-2/TC5-0/USBDM" pad="45"/> +<connect gate="G$1" pin="PA25/SER3-3/SER5-3/TC5-1/USBDP" pad="46"/> +<connect gate="G$1" pin="PA27/GCLK-1" pad="51"/> +<connect gate="G$1" pin="PA30/SER7-2/SER1-2/TC6-0/SWCLK" pad="57"/> +<connect gate="G$1" pin="PA31/SER7-3/SER1-3/TC6-1" pad="58"/> +<connect gate="G$1" pin="PB00/ADC0-12/SER5-2/TC7-0" pad="61"/> +<connect gate="G$1" pin="PB01/ADC0-13/SER5-3/TC7-1" pad="62"/> +<connect gate="G$1" pin="PB02/ADC0-14/SER5-0/TC6-0" pad="63"/> +<connect gate="G$1" pin="PB03/ADC0/SER5-1/TC6" pad="64"/> +<connect gate="G$1" pin="PB04/ADC1-6" pad="5"/> +<connect gate="G$1" pin="PB05/ADC1-7" pad="6"/> +<connect gate="G$1" pin="PB06/ADC1-8" pad="9"/> +<connect gate="G$1" pin="PB07/ADC1-9" pad="10"/> +<connect gate="G$1" pin="PB08/ADC0-2/ADC1-9/SER4-0/TC4-0" pad="11"/> +<connect gate="G$1" pin="PB09/ADC0-3/ADC1-1/SE4-1/TC4-1" pad="12"/> +<connect gate="G$1" pin="PB10/SER4-2/TC5-0" pad="23"/> +<connect gate="G$1" pin="PB11/SER4-3/TC5-1" pad="24"/> +<connect gate="G$1" pin="PB12/SER4-0/TC4-0" pad="25"/> +<connect gate="G$1" pin="PB13/SER4-1/TC4-1" pad="26"/> +<connect gate="G$1" pin="PB14/SER4-2/TC5-0" pad="27"/> +<connect gate="G$1" pin="PB15/SER4-3/TC5-1" pad="28"/> +<connect gate="G$1" pin="PB16/SER5-0/TC6-0" pad="39"/> +<connect gate="G$1" pin="PB17/SER5-1/TC6-1" pad="40"/> +<connect gate="G$1" pin="PB22/SER1-2/SER5-2/TC7-0" pad="49"/> +<connect gate="G$1" pin="PB23/SER1-3/SER5-3/TC7-1" pad="50"/> +<connect gate="G$1" pin="PB30/SER7-0/SER5-1/TC0-0/SWDIO" pad="59"/> +<connect gate="G$1" pin="PB31/SER7-1/SER5-0/TC0-1" pad="60"/> +<connect gate="G$1" pin="RESETN" pad="52"/> +<connect gate="G$1" pin="VDDANA" pad="8"/> +<connect gate="G$1" pin="VDDCORE" pad="53"/> +<connect gate="G$1" pin="VDDIO@1" pad="21"/> +<connect gate="G$1" pin="VDDIO@2" pad="34"/> +<connect gate="G$1" pin="VDDIO@3" pad="48"/> +<connect gate="G$1" pin="VDDIO@4" pad="56"/> +<connect gate="G$1" pin="VSW" pad="55"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="TC2030-SWD" prefix="J" uservalue="yes"> +<description><h3>TAG-CONNECT ICSP Connector</h3><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> +Two variants - one "with legs" (for hands-free fit on PCB) and another "without legs" for quick programming. + +<p> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<gates> +<gate name="G$1" symbol="6-PIN-SWD" x="0" y="0"/> +</gates> +<devices> +<device name="-MCP" package="TC2030-MCP"> +<connects> +<connect gate="G$1" pin="GND@1" pad="3"/> +<connect gate="G$1" pin="GND@2" pad="5"/> +<connect gate="G$1" pin="RESET" pad="2"/> +<connect gate="G$1" pin="SWCLK" pad="4"/> +<connect gate="G$1" pin="SWDIO" pad="6"/> +<connect gate="G$1" pin="VDD" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-MCP-NL" package="TC2030-MCP-NL"> +<connects> +<connect gate="G$1" pin="GND@1" pad="3"/> +<connect gate="G$1" pin="GND@2" pad="5"/> +<connect gate="G$1" pin="RESET" pad="2"/> +<connect gate="G$1" pin="SWCLK" pad="4"/> +<connect gate="G$1" pin="SWDIO" pad="6"/> +<connect gate="G$1" pin="VDD" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="" package="TC2030-MCP-NL-CP"> +<connects> +<connect gate="G$1" pin="GND@1" pad="3"/> +<connect gate="G$1" pin="GND@2" pad="5"/> +<connect gate="G$1" pin="RESET" pad="2"/> +<connect gate="G$1" pin="SWCLK" pad="4"/> +<connect gate="G$1" pin="SWDIO" pad="6"/> +<connect gate="G$1" pin="VDD" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/eagle/fab.lbr b/eagle/fab.lbr index 59ce26d..acc2797 100644 --- a/eagle/fab.lbr +++ b/eagle/fab.lbr @@ -7,7 +7,7 @@ <setting keepoldvectorfont="yes"/> <setting verticaltext="up"/> </settings> -<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.01" altunitdist="inch" altunit="inch"/> <layers> <layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> <layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/> @@ -4358,8 +4358,8 @@ Amplified SiSonic (TM) Microphone</description> <pin name="PE1/XCK0/SCL" x="-25.4" y="-35.56" length="middle"/> <pin name="PE2/RXD0" x="-25.4" y="-33.02" length="middle"/> <pin name="PE3/TXD0" x="-25.4" y="-30.48" length="middle"/> -<pin name="PD7/TXD1/SCK" x="27.94" y="-20.32" length="middle" rot="R180"/> -<pin name="PD6/RXD1/MISO" x="27.94" y="-22.86" length="middle" rot="R180"/> +<pin name="PD7/TXD1/SCK/DP" x="27.94" y="-20.32" length="middle" rot="R180"/> +<pin name="PD6/RXD1/MISO/DM" x="27.94" y="-22.86" length="middle" rot="R180"/> <pin name="PD5/XCK1/MOSI" x="27.94" y="-25.4" length="middle" rot="R180"/> <pin name="PD4/CS" x="27.94" y="-27.94" length="middle" rot="R180"/> <pin name="PD3/TXD0" x="27.94" y="-30.48" length="middle" rot="R180"/> @@ -4498,14 +4498,14 @@ Amplified SiSonic (TM) Microphone</description> <pin name="PB9/XIN" x="-33.02" y="-53.34" length="middle"/> <pin name="PB12/ERASE" x="-33.02" y="-50.8" length="middle"/> <pin name="PB13/DAC0/SCK0" x="-33.02" y="-48.26" length="middle"/> -<pin name="PD1/PWMC1_PWMLO" x="30.48" y="-2.54" length="middle" rot="R180"/> -<pin name="PD2/PWMC1_PWMH0" x="30.48" y="-5.08" length="middle" rot="R180"/> -<pin name="PD3/PWMC1_PWML1" x="30.48" y="-7.62" length="middle" rot="R180"/> -<pin name="PD4/PWMC1_PWMH1" x="30.48" y="-10.16" length="middle" rot="R180"/> -<pin name="PD5/PWMC1_PWML2" x="30.48" y="-12.7" length="middle" rot="R180"/> -<pin name="PD6/PWMC1_PWMH2" x="30.48" y="-15.24" length="middle" rot="R180"/> -<pin name="PD7/PWMC1_PWML3" x="30.48" y="-17.78" length="middle" rot="R180"/> -<pin name="PD8/PWMC1_PWMH3" x="30.48" y="-20.32" length="middle" rot="R180"/> +<pin name="PD1/PWMC1_PWMH0" x="30.48" y="-2.54" length="middle" rot="R180"/> +<pin name="PD2/PWMC1_PWML1" x="30.48" y="-5.08" length="middle" rot="R180"/> +<pin name="PD3/PWMC1_PWMH1" x="30.48" y="-7.62" length="middle" rot="R180"/> +<pin name="PD4/PWMC1_PWML2" x="30.48" y="-10.16" length="middle" rot="R180"/> +<pin name="PD5/PWMC1_PWMH2" x="30.48" y="-12.7" length="middle" rot="R180"/> +<pin name="PD6/PWMC1_PWML3" x="30.48" y="-15.24" length="middle" rot="R180"/> +<pin name="PD7/PWMC1_PWMH3" x="30.48" y="-17.78" length="middle" rot="R180"/> +<pin name="PD8" x="30.48" y="-20.32" length="middle" rot="R180"/> <pin name="PD9" x="30.48" y="-22.86" length="middle" rot="R180"/> <pin name="PD10/PWMC0_PWML0" x="30.48" y="-25.4" length="middle" rot="R180"/> <pin name="PD11/PWMC0_PWMH0" x="30.48" y="-27.94" length="middle" rot="R180"/> @@ -4527,7 +4527,7 @@ Amplified SiSonic (TM) Microphone</description> <pin name="PD28/URXD3/TWCK2" x="30.48" y="-68.58" length="middle" rot="R180"/> <pin name="PD30/UTXD3" x="30.48" y="-71.12" length="middle" rot="R180"/> <pin name="PD31" x="30.48" y="-73.66" length="middle" rot="R180"/> -<pin name="PD0/DAC1" x="30.48" y="0" length="middle" rot="R180"/> +<pin name="PD0/DAC1/PWMC1_PWML0" x="30.48" y="0" length="middle" rot="R180"/> <pin name="VDDIO1" x="-33.02" y="58.42" length="middle"/> <pin name="VDDIO2" x="-33.02" y="55.88" length="middle"/> <pin name="VDDIO3" x="-33.02" y="53.34" length="middle"/> @@ -6192,8 +6192,8 @@ Standard adjustable voltage regulator but in SMD form. Spark Fun Electronics SKU <connect gate="G$1" pin="PD3/TXD0" pad="23"/> <connect gate="G$1" pin="PD4/CS" pad="24"/> <connect gate="G$1" pin="PD5/XCK1/MOSI" pad="25"/> -<connect gate="G$1" pin="PD6/RXD1/MISO" pad="26"/> -<connect gate="G$1" pin="PD7/TXD1/SCK" pad="27"/> +<connect gate="G$1" pin="PD6/RXD1/MISO/DM" pad="26"/> +<connect gate="G$1" pin="PD7/TXD1/SCK/DP" pad="27"/> <connect gate="G$1" pin="PDI_DATA" pad="34"/> <connect gate="G$1" pin="PE0/SDA" pad="28"/> <connect gate="G$1" pin="PE1/XCK0/SCL" pad="29"/> @@ -6243,8 +6243,8 @@ Standard adjustable voltage regulator but in SMD form. Spark Fun Electronics SKU <connect gate="G$1" pin="PD3/TXD0" pad="23"/> <connect gate="G$1" pin="PD4/CS" pad="24"/> <connect gate="G$1" pin="PD5/XCK1/MOSI" pad="25"/> -<connect gate="G$1" pin="PD6/RXD1/MISO" pad="26"/> -<connect gate="G$1" pin="PD7/TXD1/SCK" pad="27"/> +<connect gate="G$1" pin="PD6/RXD1/MISO/DM" pad="26"/> +<connect gate="G$1" pin="PD7/TXD1/SCK/DP" pad="27"/> <connect gate="G$1" pin="PDI_DATA" pad="34"/> <connect gate="G$1" pin="PE0/SDA" pad="28"/> <connect gate="G$1" pin="PE1/XCK0/SCL" pad="29"/> @@ -6381,8 +6381,8 @@ Standard adjustable voltage regulator but in SMD form. Spark Fun Electronics SKU <connect gate="G$1" pin="PB7/SWCLK/TCK" pad="63"/> <connect gate="G$1" pin="PB8/XOUT" pad="98"/> <connect gate="G$1" pin="PB9/XIN" pad="99"/> -<connect gate="G$1" pin="PD0/DAC1" pad="1"/> -<connect gate="G$1" pin="PD1/PWMC1_PWMLO" pad="92"/> +<connect gate="G$1" pin="PD0/DAC1/PWMC1_PWML0" pad="1"/> +<connect gate="G$1" pin="PD1/PWMC1_PWMH0" pad="92"/> <connect gate="G$1" pin="PD10/PWMC0_PWML0" pad="71"/> <connect gate="G$1" pin="PD11/PWMC0_PWMH0" pad="69"/> <connect gate="G$1" pin="PD12/SPI0_NPCS2" pad="65"/> @@ -6393,7 +6393,7 @@ Standard adjustable voltage regulator but in SMD form. Spark Fun Electronics SKU <connect gate="G$1" pin="PD17" pad="53"/> <connect gate="G$1" pin="PD18/URXD4" pad="49"/> <connect gate="G$1" pin="PD19/UTXD4" pad="47"/> -<connect gate="G$1" pin="PD2/PWMC1_PWMH0" pad="91"/> +<connect gate="G$1" pin="PD2/PWMC1_PWML1" pad="91"/> <connect gate="G$1" pin="PD20/SPI0_MISO" pad="45"/> <connect gate="G$1" pin="PD21/SPI0_MOSI" pad="43"/> <connect gate="G$1" pin="PD22_SPI0_SPCK" pad="41"/> @@ -6402,14 +6402,14 @@ Standard adjustable voltage regulator but in SMD form. Spark Fun Electronics SKU <connect gate="G$1" pin="PD26/UTXD2" pad="36"/> <connect gate="G$1" pin="PD27/SPI0_NPCS3/TWD2" pad="32"/> <connect gate="G$1" pin="PD28/URXD3/TWCK2" pad="51"/> -<connect gate="G$1" pin="PD3/PWMC1_PWML1" pad="89"/> +<connect gate="G$1" pin="PD3/PWMC1_PWMH1" pad="89"/> <connect gate="G$1" pin="PD30/UTXD3" pad="23"/> <connect gate="G$1" pin="PD31" pad="2"/> -<connect gate="G$1" pin="PD4/PWMC1_PWMH1" pad="88"/> -<connect gate="G$1" pin="PD5/PWMC1_PWML2" pad="87"/> -<connect gate="G$1" pin="PD6/PWMC1_PWMH2" pad="85"/> -<connect gate="G$1" pin="PD7/PWMC1_PWML3" pad="84"/> -<connect gate="G$1" pin="PD8/PWMC1_PWMH3" pad="80"/> +<connect gate="G$1" pin="PD4/PWMC1_PWML2" pad="88"/> +<connect gate="G$1" pin="PD5/PWMC1_PWMH2" pad="87"/> +<connect gate="G$1" pin="PD6/PWMC1_PWML3" pad="85"/> +<connect gate="G$1" pin="PD7/PWMC1_PWMH3" pad="84"/> +<connect gate="G$1" pin="PD8" pad="80"/> <connect gate="G$1" pin="PD9" pad="78"/> <connect gate="G$1" pin="TST" pad="60"/> <connect gate="G$1" pin="USB_DM" pad="94"/> diff --git a/eagle/motors.lbr b/eagle/motors.lbr new file mode 100644 index 0000000..d67a857 --- /dev/null +++ b/eagle/motors.lbr @@ -0,0 +1,117 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="8.3.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/> +<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/> +<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/> +<layer number="32" name="bCream" color="7" fill="5" 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gate="G$1" pin="IN" pad="3"/> +<connect gate="G$1" pin="OUT1" pad="2"/> +<connect gate="G$1" pin="OUT2" pad="4"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="WSL2726" prefix="R" uservalue="yes"> +<description><b>SMD SHUNT RESISTOR</b></description> +<gates> +<gate name="G$1" symbol="WSL2726" x="0" y="0"/> +</gates> +<devices> +<device name="" package="WSL2726"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="B" pad="B"/> +<connect gate="G$1" pin="SA" pad="SA"/> +<connect gate="G$1" pin="SB" pad="SB"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="BFC" prefix="BFC"> +<gates> +<gate name="G$1" symbol="C-US" x="0" y="0"/> +</gates> +<devices> +<device name="" package="BFC"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="IRF6648" prefix="Q"> +<description><b>DirectFET Power MOSFET</b><p> +Source: http://www.irf.com/product-info/datasheets/data/irf6648.pdf</description> +<gates> +<gate name="G$1" symbol="MFN-S2-D4" x="0" y="0"/> +</gates> +<devices> +<device name="" package="DIRECTFET"> +<connects> +<connect gate="G$1" pin="D" pad="D@1"/> +<connect gate="G$1" pin="D@1" pad="D@2"/> +<connect gate="G$1" pin="D@2" pad="D@3"/> +<connect gate="G$1" pin="D@3" pad="D@4"/> +<connect gate="G$1" pin="G" pad="G"/> +<connect gate="G$1" pin="S" pad="S@1"/> +<connect gate="G$1" pin="S@1" pad="S@2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="H-BRIDGE_FDMQ86530L"> +<gates> +<gate name="G$1" symbol="FDMQ86530L" x="0" y="0"/> +</gates> +<devices> +<device name="" package="MLP4.5X5_3PAD"> +<connects> +<connect gate="G$1" pin="D1/D4@1" pad="P$2"/> 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gate="G$1" pin="BMA2" pad="4"/> +<connect gate="G$1" pin="BMB1" pad="20"/> +<connect gate="G$1" pin="BMB2" pad="21"/> +<connect gate="G$1" pin="CLK" pad="16"/> +<connect gate="G$1" pin="CSN" pad="14"/> +<connect gate="G$1" pin="DIE_PAD" pad="EXP"/> +<connect gate="G$1" pin="DIR" pad="30"/> +<connect gate="G$1" pin="ENABLE" pad="15"/> +<connect gate="G$1" pin="GND@1" pad="1"/> +<connect gate="G$1" pin="GND@2" pad="13"/> +<connect gate="G$1" pin="GNDP" pad="28"/> +<connect gate="G$1" pin="HA1" pad="2"/> +<connect gate="G$1" pin="HA2" pad="3"/> +<connect gate="G$1" pin="HB1" pad="23"/> +<connect gate="G$1" pin="HB2" pad="22"/> +<connect gate="G$1" pin="LA1" pad="6"/> +<connect gate="G$1" pin="LA2" pad="7"/> +<connect gate="G$1" pin="LB1" pad="19"/> +<connect gate="G$1" pin="LB2" pad="18"/> +<connect gate="G$1" pin="SCK" pad="12"/> +<connect gate="G$1" pin="SDI" pad="11"/> +<connect gate="G$1" pin="SDO" pad="10"/> +<connect gate="G$1" pin="SG_TST" pad="27"/> +<connect gate="G$1" pin="SRA" pad="8"/> +<connect gate="G$1" pin="SRB" pad="17"/> +<connect gate="G$1" pin="STEP" pad="31"/> +<connect gate="G$1" pin="TEST_ANA" pad="26"/> +<connect gate="G$1" pin="TST_MODE" pad="32"/> +<connect gate="G$1" pin="VCC_IO" pad="29"/> +<connect gate="G$1" pin="VHS" pad="24"/> +<connect gate="G$1" pin="VS" pad="25"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="PWRPAD" prefix="J"> +<gates> +<gate name="G$1" symbol="PWRPAD" x="0" y="0"/> +</gates> +<devices> +<device name="2-5MM" package="PWRPAD_2-5MM"> +<connects> +<connect gate="G$1" pin="PWRPAD" pad="P$1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="4MM" package="PWRPAD_4MM"> +<connects> +<connect gate="G$1" pin="PWRPAD" pad="P$1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FDMQ8203"> +<gates> +<gate name="G$1" symbol="FDMQ8203" x="0" y="0"/> +</gates> +<devices> +<device name="" package="MLP4.5X5_4PAD"> +<connects> +<connect gate="G$1" pin="D1/D2@1" pad="P$13"/> +<connect gate="G$1" pin="D1/D2@2" pad="P$15"/> +<connect gate="G$1" pin="D3/D4@1" pad="P$14"/> +<connect gate="G$1" pin="D3/D4@2" pad="P$16"/> +<connect gate="G$1" pin="G1" pad="P$1"/> +<connect gate="G$1" pin="G2" pad="P$4"/> +<connect gate="G$1" pin="G3" pad="P$9"/> +<connect gate="G$1" pin="G4" pad="P$12"/> +<connect gate="G$1" pin="S1@1" pad="P$2"/> +<connect gate="G$1" pin="S1@2" pad="P$3"/> +<connect gate="G$1" pin="S2@1" pad="P$5"/> +<connect gate="G$1" pin="S2@2" pad="P$6"/> +<connect gate="G$1" pin="S3@1" pad="P$7"/> +<connect gate="G$1" pin="S3@2" pad="P$8"/> +<connect gate="G$1" pin="S4@1" pad="P$10"/> +<connect gate="G$1" pin="S4@2" pad="P$11"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/eagle/sensor.lbr b/eagle/sensor.lbr new file mode 100644 index 0000000..7403f01 --- /dev/null +++ b/eagle/sensor.lbr @@ -0,0 +1,465 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="8.3.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/> +<layer 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y="2.54" length="middle" rot="R180"/> +<pin name="VDD" x="15.24" y="0" length="middle" rot="R180"/> +<pin name="U" x="15.24" y="-2.54" length="middle" rot="R180"/> +<pin name="V" x="15.24" y="-5.08" length="middle" rot="R180"/> +<pin name="W" x="15.24" y="-7.62" length="middle" rot="R180"/> +<wire x1="-10.16" y1="10.16" x2="10.16" y2="10.16" width="0.254" layer="94"/> +<wire x1="10.16" y1="10.16" x2="10.16" y2="-10.16" width="0.254" layer="94"/> +<wire x1="10.16" y1="-10.16" x2="-10.16" y2="-10.16" width="0.254" layer="94"/> +<wire x1="-10.16" y1="-10.16" x2="-10.16" y2="10.16" width="0.254" layer="94"/> +<text x="-2.54" y="12.7" size="1.27" layer="95">>NAME</text> +<text x="-2.54" y="-12.7" size="1.27" layer="96">>VALUE</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="AS5304-6"> +<gates> +<gate name="G$1" symbol="AS5304-6" x="0" y="0"/> +</gates> +<devices> +<device name="" package="TSSOP20-08THIN"> +<connects> +<connect gate="G$1" pin="A" pad="2"/> +<connect gate="G$1" pin="AO" pad="6"/> +<connect gate="G$1" pin="B" pad="4"/> +<connect gate="G$1" pin="INDEX" pad="8"/> +<connect gate="G$1" pin="NC1" pad="9"/> +<connect gate="G$1" pin="NC2" pad="10"/> +<connect gate="G$1" pin="NC3" pad="11"/> +<connect gate="G$1" pin="TEST1" pad="5"/> +<connect gate="G$1" pin="TEST2" pad="12"/> +<connect gate="G$1" pin="TEST3" pad="13"/> +<connect gate="G$1" pin="TEST4" pad="14"/> +<connect gate="G$1" pin="TEST5" pad="17"/> +<connect gate="G$1" pin="TEST6" pad="18"/> +<connect gate="G$1" pin="TEST7" pad="19"/> +<connect gate="G$1" pin="TEST_GND" pad="15"/> +<connect gate="G$1" pin="VDD" pad="7"/> +<connect gate="G$1" pin="VDDA" pad="16"/> +<connect gate="G$1" pin="VDDP" pad="3"/> +<connect gate="G$1" pin="VSS" pad="1"/> +<connect gate="G$1" pin="ZPZ" pad="20"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="AS5040" prefix="IC"> +<description><b>10-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER</b><p> +Source: www.austriamicrosystems.com .. AS5040DataSheetRev12.pdf</description> +<gates> +<gate name="G$1" symbol="AS5040" x="0" y="0"/> +</gates> +<devices> +<device name="" package="SSOP16"> +<connects> +<connect gate="G$1" pin="A_LSB_U" pad="3"/> +<connect gate="G$1" pin="B_DIR_V" pad="4"/> +<connect gate="G$1" pin="CLK" pad="10"/> +<connect gate="G$1" pin="COIL" pad="5"/> +<connect gate="G$1" pin="CSN" pad="11"/> +<connect gate="G$1" pin="D0" pad="9"/> +<connect gate="G$1" pin="INDEX_W" pad="6"/> +<connect gate="G$1" pin="MAGDEC" pad="2"/> +<connect gate="G$1" pin="MAGINC" pad="1"/> +<connect gate="G$1" pin="PROG" pad="8"/> +<connect gate="G$1" pin="PWN" pad="12"/> +<connect gate="G$1" pin="T_B_0" pad="13"/> +<connect gate="G$1" pin="T_B_1" pad="14"/> +<connect gate="G$1" pin="VDD3V3" pad="15"/> +<connect gate="G$1" pin="VDD5V" pad="16"/> +<connect gate="G$1" pin="VSS" pad="7"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="AS5040ASSU" constant="no"/> +<attribute name="OC_FARNELL" value="1630800" constant="no"/> +<attribute name="OC_NEWARK" value="59P4059" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="AS5047"> +<gates> +<gate name="G$1" symbol="AS5047" x="0" y="0"/> +</gates> +<devices> +<device name="" package="TSSOP14"> +<connects> +<connect gate="G$1" pin="A" pad="6"/> +<connect gate="G$1" pin="B" pad="7"/> +<connect gate="G$1" pin="CLK" pad="2"/> +<connect gate="G$1" pin="CSN" pad="1"/> +<connect gate="G$1" pin="GND" pad="13"/> +<connect gate="G$1" pin="I" pad="14"/> +<connect gate="G$1" pin="MISO" pad="3"/> +<connect gate="G$1" pin="MOSI" pad="4"/> +<connect gate="G$1" pin="TEST" pad="5"/> +<connect gate="G$1" pin="U" pad="10"/> +<connect gate="G$1" pin="V" pad="9"/> +<connect gate="G$1" pin="VDD" pad="11"/> +<connect gate="G$1" pin="VDD3V" pad="12"/> +<connect gate="G$1" pin="W" pad="8"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/eagle/tag-connect-2030.lbr b/eagle/tag-connect-2030.lbr new file mode 100644 index 0000000..da24cc2 --- /dev/null +++ b/eagle/tag-connect-2030.lbr @@ -0,0 +1,468 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="8.3.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting keepoldvectorfont="yes"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="yes"/> +<layer number="15" name="Route15" color="4" fill="6" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="29" name="tStop" color="7" fill="3" visible="yes" active="yes"/> +<layer number="30" name="bStop" color="7" fill="6" visible="yes" active="yes"/> +<layer number="31" name="tCream" color="7" fill="4" visible="yes" active="yes"/> +<layer number="32" name="bCream" color="7" fill="5" visible="yes" active="yes"/> +<layer number="33" name="tFinish" color="6" fill="3" visible="yes" active="yes"/> +<layer number="34" name="bFinish" color="6" fill="6" visible="yes" active="yes"/> +<layer number="35" name="tGlue" color="7" fill="4" visible="yes" active="yes"/> +<layer number="36" name="bGlue" color="7" fill="5" visible="yes" active="yes"/> +<layer number="37" name="tTest" color="7" fill="1" visible="yes" active="yes"/> +<layer number="38" name="bTest" color="7" fill="1" visible="yes" active="yes"/> +<layer number="39" name="tKeepout" color="4" fill="11" visible="yes" active="yes"/> +<layer number="40" name="bKeepout" color="1" fill="11" visible="yes" active="yes"/> +<layer number="41" name="tRestrict" color="4" fill="10" visible="yes" active="yes"/> +<layer number="42" name="bRestrict" color="1" fill="10" visible="yes" active="yes"/> +<layer number="43" name="vRestrict" color="2" fill="10" visible="yes" active="yes"/> +<layer number="44" name="Drills" color="7" fill="1" visible="yes" active="yes"/> +<layer number="45" name="Holes" color="7" fill="1" visible="yes" active="yes"/> +<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="yes"/> +<layer number="47" name="Measures" color="7" fill="1" visible="yes" active="yes"/> +<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/> +<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/> +<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/> +<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="yes"/> +<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/> +<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/> +<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/> +<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/> +<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/> +<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/> +<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/> +<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> +</layers> +<library> +<description><h3>TAG-CONNECT ICSP Connector</h3><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> +Two variants - one "with legs" (for hands-free fit on PCB) and another "without legs" for quick programming. + +<p> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<packages> +<package name="TC2030-MCP-NL"> +<description><B>TAG-CONNECT ICSP Connector</B><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> + +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-0.635" y="1.27" size="1.27" layer="25">>name</text> +<hole x="0" y="0" drill="0.889"/> +<hole x="5.08" y="-1.016" drill="0.889"/> +<hole x="5.08" y="1.016" drill="0.889"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +</package> +<package name="TC2030-MCP-NL-CP"> +<description><B>TAG-CONNECT ICSP Connector</B><I>- with optional copper pads for steel alignment pins</I><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +<B>Note:</B> Suitable Receptacle pins are 0295-0-15-xx-06-xx-10-0 series from <a href="www.mill-max.com">Mill-Max</a><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-1.27" y="1.905" size="1.27" layer="25">>name</text> +<hole x="0" y="0" drill="1.6"/> +<hole x="5.08" y="1.016" drill="1.6"/> +<hole x="5.08" y="-1.016" drill="1.6"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +<polygon width="0.0254" layer="16"> +<vertex x="3.556" y="-1.016" curve="90"/> +<vertex x="5.08" y="-2.54" curve="90"/> +<vertex x="6.604" y="-1.016"/> +<vertex x="6.604" y="1.016" curve="90"/> +<vertex x="5.08" y="2.54" curve="90"/> +<vertex x="3.556" y="1.016"/> +</polygon> +<polygon width="0.0254" layer="16"> +<vertex x="-1.524" y="0" curve="-90"/> +<vertex x="0" y="1.524" curve="-90"/> +<vertex x="1.524" y="0" curve="-90"/> +<vertex x="0" y="-1.524" curve="-90"/> +</polygon> +<polygon width="0.254" layer="30"> +<vertex x="3.556" y="-1.016" curve="90"/> +<vertex x="5.08" y="-2.54" curve="90"/> +<vertex x="6.604" y="-1.016"/> +<vertex x="6.604" y="1.016" curve="90"/> +<vertex x="5.08" y="2.54" curve="90"/> +<vertex x="3.556" y="1.016"/> +</polygon> +<polygon width="0.254" layer="30"> +<vertex x="-1.524" y="0" curve="-90"/> +<vertex x="0" y="1.524" curve="-90"/> +<vertex x="1.524" y="0" curve="-90"/> +<vertex x="0" y="-1.524" curve="-90"/> +</polygon> +</package> +<package name="TC2030-MCP"> +<description><b>TAG-CONNECT ICSP Connector</b> - Legged version<BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a> +<p> +Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" 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+</symbol> +</symbols> +<devicesets> +<deviceset name="TC2030-ICSP" prefix="J" uservalue="yes"> +<description><h3>TAG-CONNECT ICSP Connector</h3><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> +Two variants - one "with legs" (for hands-free fit on PCB) and another "without legs" for quick programming. + +<p> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<gates> +<gate name="G$1" symbol="ICSP" x="0" y="0"/> +</gates> +<devices> +<device name="-MCP" package="TC2030-MCP"> +<connects> +<connect gate="G$1" pin="ICSP_CLK/PGC" pad="5"/> +<connect gate="G$1" pin="ICSP_DAT/PGD" pad="4"/> +<connect gate="G$1" pin="LVP" pad="6"/> +<connect gate="G$1" pin="VDD" pad="2"/> +<connect gate="G$1" pin="VPP/MCLR" pad="1"/> +<connect gate="G$1" pin="VSS(GND)" pad="3"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-MCP-NL" package="TC2030-MCP-NL"> +<connects> +<connect gate="G$1" pin="ICSP_CLK/PGC" pad="5"/> +<connect gate="G$1" pin="ICSP_DAT/PGD" pad="4"/> +<connect gate="G$1" pin="LVP" pad="6"/> +<connect gate="G$1" pin="VDD" pad="2"/> +<connect gate="G$1" pin="VPP/MCLR" pad="1"/> +<connect gate="G$1" pin="VSS(GND)" pad="3"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="" package="TC2030-MCP-NL-CP"> +<connects> +<connect gate="G$1" pin="ICSP_CLK/PGC" pad="5"/> +<connect gate="G$1" pin="ICSP_DAT/PGD" pad="4"/> +<connect gate="G$1" pin="LVP" pad="6"/> +<connect gate="G$1" pin="VDD" pad="2"/> +<connect gate="G$1" pin="VPP/MCLR" pad="1"/> +<connect gate="G$1" pin="VSS(GND)" pad="3"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="TC2030-PDI"> +<gates> +<gate name="G$1" symbol="PDI" x="0" y="0"/> +</gates> +<devices> +<device name="" package="TC2030-MCP"> +<connects> +<connect gate="G$1" pin="GND" pad="6"/> +<connect gate="G$1" pin="NC-1" pad="3"/> +<connect gate="G$1" pin="NC-2" pad="4"/> +<connect gate="G$1" pin="PDI-CLK/RESET" pad="1"/> +<connect gate="G$1" pin="PDI-DATA" pad="5"/> +<connect gate="G$1" pin="VCC" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/eagle/tag-connect-2050.lbr b/eagle/tag-connect-2050.lbr new file mode 100644 index 0000000..e633bce --- /dev/null +++ b/eagle/tag-connect-2050.lbr @@ -0,0 +1,343 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="8.3.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting keepoldvectorfont="yes"/> +<setting verticaltext="up"/> +</settings> +<grid distance="50" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="5" altunitdist="mil" altunit="mil"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="2" name="Route2" color="1" fill="3" visible="no" active="yes"/> +<layer number="3" name="Route3" color="4" fill="3" visible="no" active="yes"/> +<layer number="4" name="Route4" color="1" fill="4" visible="no" active="yes"/> +<layer number="5" name="Route5" color="4" fill="4" visible="no" active="yes"/> +<layer number="6" name="Route6" color="1" fill="8" visible="no" active="yes"/> +<layer number="7" name="Route7" color="4" fill="8" visible="no" active="yes"/> +<layer number="8" name="Route8" color="1" fill="2" visible="no" active="yes"/> +<layer number="9" name="Route9" color="4" fill="2" visible="no" active="yes"/> +<layer number="10" name="Route10" color="1" fill="7" visible="no" active="yes"/> +<layer number="11" name="Route11" color="4" fill="7" visible="no" active="yes"/> +<layer number="12" name="Route12" color="1" fill="5" visible="no" active="yes"/> +<layer number="13" name="Route13" color="4" fill="5" visible="no" active="yes"/> +<layer number="14" name="Route14" color="1" fill="6" visible="no" active="yes"/> +<layer number="15" name="Route15" color="4" fill="6" visible="no" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" 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+<layer number="205" name="205bmp" color="6" fill="10" visible="no" active="yes"/> +<layer number="206" name="206bmp" color="7" fill="10" visible="no" active="yes"/> +<layer number="207" name="207bmp" color="8" fill="10" visible="no" active="yes"/> +<layer number="208" name="208bmp" color="9" fill="10" visible="no" active="yes"/> +<layer number="231" name="Eagle3D_PG1" color="14" fill="1" visible="no" active="yes"/> +<layer number="232" name="Eagle3D_PG2" color="14" fill="2" visible="no" active="yes"/> +<layer number="233" name="Eagle3D_PG3" color="14" fill="4" visible="no" active="yes"/> +<layer number="250" name="Descript" color="7" fill="1" visible="no" active="yes"/> +<layer number="251" name="SMDround" color="7" fill="1" visible="no" active="yes"/> +<layer number="254" name="OrgLBR" color="13" fill="1" visible="no" active="no"/> +</layers> +<library> +<packages> +<package name="TC2050-MCP-NL"> +<description><B>TAG-CONNECT ISP Connector</B><BR><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit PCB Programming. Designed for Standard JTAG 10 Pin, suitable for many others.<BR> +<BR>Footprint for TC2050 NL <BR> + +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>VTREF</TD></TR> +<TR><TD align=center>2</TD><TD>nTRST</TD></TR> +<TR><TD align=center>3</TD><TD>TDI</TD></TR> +<TR><TD align=center>4</TD><TD>TMS</TD></TR> +<TR><TD align=center>5</TD><TD>TCK</TD></TR> +<TR><TD align=center>6</TD><TD>RTCK</TD></TR> +<TR><TD align=center>7</TD><TD>TDO</TD></TR> +<TR><TD align=center>8</TD><TD>RESET</TD></TR> +<TR><TD align=center>9</TD><TD>GND</TD></TR> +<TR><TD align=center>10</TD><TD>NC</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz +Modified 7/2011 by Tim McCarthy-Smith +VIDA Products INC</description> +<wire x1="0" y1="-2.54" x2="7.62" y2="-2.54" width="0.127" layer="21"/> +<smd name="10" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="9" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="8" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="2" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="7" x="5.08" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="6.35" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="5.08" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="6.35" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-0.635" y="1.27" size="1.27" layer="25">>name</text> +<hole x="0" y="0" drill="1"/> +<hole x="7.62" y="-1.016" drill="1"/> +<hole x="7.62" y="1.016" drill="1"/> +</package> +<package name="TC2050-MCP"> +<description><B>TAG-CONNECT ISP Connector</B><BR><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit PCB Programming. Designed for Standard JTAG 10 Pin, suitable for many others.<BR> +<BR>Footprint for TC2050 NL <BR> + +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>VTREF</TD></TR> +<TR><TD align=center>2</TD><TD>nTRST</TD></TR> +<TR><TD align=center>3</TD><TD>TDI</TD></TR> +<TR><TD align=center>4</TD><TD>TMS</TD></TR> +<TR><TD align=center>5</TD><TD>TCK</TD></TR> +<TR><TD align=center>6</TD><TD>RTCK</TD></TR> +<TR><TD align=center>7</TD><TD>TDO</TD></TR> +<TR><TD align=center>8</TD><TD>RESET</TD></TR> +<TR><TD align=center>9</TD><TD>GND</TD></TR> +<TR><TD align=center>10</TD><TD>NC</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz +Modified 7/2011 by Tim McCarthy-Smith +VIDA Products INC</description> +<wire x1="0" y1="-2.54" x2="7.62" y2="-2.54" width="0.127" layer="21"/> +<smd name="10" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="9" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="8" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="2" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="7" x="5.08" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="6.35" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="5.08" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="6.35" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-0.635" y="1.27" size="1.27" layer="25">>name</text> +<hole x="0" y="0" drill="1"/> +<hole x="7.62" y="-1.016" drill="1"/> +<hole x="7.62" y="1.016" drill="1"/> +<hole x="0" y="2.54" drill="2.3749"/> +<hole x="0" y="-2.54" drill="2.3749"/> +<hole x="5.715" y="2.54" drill="2.3749"/> +<hole x="5.715" y="-2.54" drill="2.3749"/> +</package> +</packages> +<symbols> +<symbol name="TC2050"> +<wire x1="-12.7" y1="15.24" x2="-12.7" y2="-35.56" width="0.254" layer="94"/> +<wire x1="-12.7" y1="-35.56" x2="7.62" y2="-35.56" width="0.254" layer="94"/> +<wire x1="7.62" y1="-35.56" x2="7.62" y2="15.24" width="0.254" layer="94"/> +<wire x1="7.62" y1="15.24" x2="-12.7" y2="15.24" width="0.254" layer="94"/> +<text x="-12.7" y="17.78" size="1.778" layer="95">>NAME</text> +<pin name="VTREF" x="-17.78" y="-12.7" length="middle"/> +<pin name="!TRST" x="-17.78" y="-2.54" length="middle"/> +<pin name="TDI" x="-17.78" y="12.7" length="middle"/> +<pin name="TMS" x="-17.78" y="7.62" length="middle"/> +<pin name="TCK" x="-17.78" y="2.54" length="middle"/> +<pin name="RTCK" x="-17.78" y="-22.86" length="middle"/> +<pin name="TDO" x="-17.78" y="-7.62" length="middle"/> +<pin name="RESET" x="-17.78" y="-17.78" length="middle"/> +<pin name="GND" x="-17.78" y="-27.94" length="middle"/> +<pin name="NC" x="-17.78" y="-33.02" length="middle"/> +</symbol> +<symbol name="GND"> +<wire x1="-1.905" y1="-2.54" x2="1.905" y2="-2.54" width="0.254" layer="94"/> +<wire x1="-2.032" y1="-2.54" x2="0" y2="-5.08" width="0.254" layer="94"/> +<wire x1="0" y1="-5.08" x2="2.032" y2="-2.54" width="0.254" layer="94"/> +<text x="-1.778" y="-6.858" size="1.4224" layer="96">>VALUE</text> +<pin name="GND" x="0" y="0" visible="off" length="short" direction="sup" rot="R270"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="TC2050" prefix="TP"> +<description><B>TAG-CONNECT ISP Connector</B><BR><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit PCB Programming. Designed for JTAG 10 pin, suitable for many others.<BR> +Pin Connection for TC2050 NL.<BR> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>VTREF</TD></TR> +<TR><TD align=center>2</TD><TD>TMS</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>TCK</TD></TR> +<TR><TD align=center>5</TD><TD>NC</TD></TR> +<TR><TD align=center>6</TD><TD>TDO</TD></TR> +<TR><TD align=center>7</TD><TD>RTCK</TD></TR> +<TR><TD align=center>8</TD><TD>TDI</TD></TR> +<TR><TD align=center>9</TD><TD>!TRST</TD></TR> +<TR><TD align=center>10</TD><TD>RESET</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz +<BR>Modified 7/2011 by Tim McCarthy-Smith +VIDA Products INC</description> +<gates> +<gate name="G$1" symbol="TC2050" x="0" y="0"/> +</gates> +<devices> +<device name="-MCP-NL" package="TC2050-MCP-NL"> +<connects> +<connect gate="G$1" pin="!TRST" pad="9"/> +<connect gate="G$1" pin="GND" pad="3"/> +<connect gate="G$1" pin="NC" pad="5"/> +<connect gate="G$1" pin="RESET" pad="10"/> +<connect gate="G$1" pin="RTCK" pad="7"/> +<connect gate="G$1" pin="TCK" pad="4"/> +<connect gate="G$1" pin="TDI" pad="8"/> +<connect gate="G$1" pin="TDO" pad="6"/> +<connect gate="G$1" pin="TMS" pad="2"/> +<connect gate="G$1" pin="VTREF" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="TC2050-NL"> +<description><B>TAG-CONNECT ISP Connector</B><BR><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit PCB Programming. Designed for JTAG 10 pin, suitable for many others.<BR> +Pin Connection for TC2050 NL.<BR> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>VTREF</TD></TR> +<TR><TD align=center>2</TD><TD>TMS</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>TCK</TD></TR> +<TR><TD align=center>5</TD><TD>NC</TD></TR> +<TR><TD align=center>6</TD><TD>TDO</TD></TR> +<TR><TD align=center>7</TD><TD>RTCK</TD></TR> +<TR><TD align=center>8</TD><TD>TDI</TD></TR> +<TR><TD align=center>9</TD><TD>!TRST</TD></TR> +<TR><TD align=center>10</TD><TD>RESET</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz +<BR>Modified 7/2011 by Tim McCarthy-Smith +VIDA Products INC</description> +<gates> +<gate name="G$1" symbol="TC2050" x="0" y="0"/> +</gates> +<devices> +<device name="-MCP-NL" package="TC2050-MCP-NL"> +<connects> +<connect gate="G$1" pin="!TRST" pad="9"/> +<connect gate="G$1" pin="GND" pad="3"/> +<connect gate="G$1" pin="NC" pad="5"/> +<connect gate="G$1" pin="RESET" pad="10"/> +<connect gate="G$1" pin="RTCK" pad="7"/> +<connect gate="G$1" pin="TCK" pad="4"/> +<connect gate="G$1" pin="TDI" pad="8"/> +<connect gate="G$1" pin="TDO" pad="6"/> +<connect gate="G$1" pin="TMS" pad="2"/> +<connect gate="G$1" pin="VTREF" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="" package="TC2050-MCP"> +<connects> +<connect gate="G$1" pin="!TRST" pad="9"/> +<connect gate="G$1" pin="GND" pad="3"/> +<connect gate="G$1" pin="NC" pad="5"/> +<connect gate="G$1" pin="RESET" pad="10"/> +<connect gate="G$1" pin="RTCK" pad="7"/> +<connect gate="G$1" pin="TCK" pad="4"/> +<connect gate="G$1" pin="TDI" pad="8"/> +<connect gate="G$1" pin="TDO" pad="6"/> +<connect gate="G$1" pin="TMS" pad="2"/> +<connect gate="G$1" pin="VTREF" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="GND" prefix="GND"> +<description>Ground Supply Symbol</description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> -- GitLab