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mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are 16 bit based. The upper half 16bits of a 32bit instruction with the major opcode, must go first in the instruction stream, hence the SWAP16 macro and swap16 array function, needed if the code is written as 32 bit word in little endian cores. Endianess info added to ejtag_iinfo. Pointer to ejtag_info and isa field added to pracc context. MIPS32 code are renamed to MIPS32_ISA_... To select the isa, the new code has an additional isa parameter (1 for micromips, 0 for mips32). In JR instruction the isa bit must be set to execute micromips code. The suffix u is added to the OP codes to avoid signed/unsigned comparison errors and to make sure the right shift is performed logically. The isa in debug mode is updated in the poll function. Code for miniprograms, in kernel mode, need to be converted. CFI code only for mips32. Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938 Signed-off-by:Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4032 Tested-by: jenkins Reviewed-by:
Freddie Chopin <freddie.chopin@gmail.com>
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- src/flash/nor/cfi.c 31 additions, 31 deletionssrc/flash/nor/cfi.c
- src/target/mips32.c 4 additions, 2 deletionssrc/target/mips32.c
- src/target/mips32.h 147 additions, 77 deletionssrc/target/mips32.h
- src/target/mips32_pracc.c 160 additions, 144 deletionssrc/target/mips32_pracc.c
- src/target/mips32_pracc.h 11 additions, 0 deletionssrc/target/mips32_pracc.h
- src/target/mips_ejtag.c 10 additions, 10 deletionssrc/target/mips_ejtag.c
- src/target/mips_ejtag.h 3 additions, 0 deletionssrc/target/mips_ejtag.h
- src/target/mips_m4k.c 8 additions, 6 deletionssrc/target/mips_m4k.c
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