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Tomas Vanek authored
Active watchdog forces reset during armv7m_checksum_memory()
in verify_image command if run just after reset init.

COP watchdog in KL series and WDOG32 in KE1 series
have longer timeout however they need to be disabled too.

The change extends 'kinetis disable_wdog' command to optionally
probe the chip and use appropriate algorithm to disable watchdog.

Setting of cache type is also split from flash_support flags.

Tcl command 'kinetis disable_wdog' is called in reset-init event.

Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e
Signed-off-by: default avatarTomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3901


Tested-by: jenkins
Reviewed-by: default avatarJoakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: default avatarFreddie Chopin <freddie.chopin@gmail.com>
5a2608bb
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Included in these directories are the src to the various ram loaders used
within openocd.

** target checksum loaders **

checksum/armv4_5_crc.s :
 - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code

checksum/armv7m_crc.s :
 - ARMv7m checksum loader : see target/armv7m.c:cortex_m_crc_code

checksum/mips32.s :
 - MIPS32 checksum loader : see target/mips32.c:mips_crc_code

** target flash loaders **

flash/pic32mx.s :
 - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code

flash/stellaris.s :
 - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code

flash/stm32x.s :
 - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code

flash/str7x.s :
 - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code

flash/str9x.s :
 - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code

Spencer Oliver
spen@spen-soft.co.uk