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self.pad.append(point(TSSOP_pad_dx,1.5*TSSOP_pad_dy,0))
self.labels.append(self.text(self.pad[-1].x,self.pad[-1].y,self.pad[-1].z,'VDD'))
#
# pin 15: RSSIA
#
self.shape = add(self.shape,translate(pad_TSSOP,TSSOP_pad_dx,2.5*TSSOP_pad_dy,0))
self.pad.append(point(TSSOP_pad_dx,2.5*TSSOP_pad_dy,0))
self.labels.append(self.text(self.pad[-1].x,self.pad[-1].y,self.pad[-1].z,'RSSIA'))
#
# pin 16: nINT/DDET
#
self.shape = add(self.shape,translate(pad_TSSOP,TSSOP_pad_dx,3.5*TSSOP_pad_dy,0))
self.pad.append(point(TSSOP_pad_dx,3.5*TSSOP_pad_dy,0))
self.labels.append(self.text(self.pad[-1].x,self.pad[-1].y,self.pad[-1].z,'nINT'))
class CBA(part):
#
# CBA logo
#
def __init__(self,r=.02):
self.value = ''
self.pad = [point(0,0,0)]
self.labels = []
d = 3*r
self.shape = cylinder(0,0,0,0,r)
self.shape = add(self.shape,translate(cylinder(0,0,0,0,r),-d,d,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),-d,0,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),-d,-d,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),0,-d,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),d,-d,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),d,0,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),d,d,0))
self.shape = add(self.shape,translate(cube(-r,r,-r,r,0,0),0,d,0))
class fab(part):
def __init__(self,r=.05):
self.value = ''
self.pad = [point(0,0,0)]
self.labels = []
d = 1.8*r
l = 3.5*r
h = r/2.
self.shape = rectangle(-d,d,-d,d)
self.shape = subtract(self.shape,circle(0,0,r))
self.shape = subtract(self.shape,rectangle(-l,0,-h,h))
self.shape = add(self.shape,rectangle(d,l,-h,h))
self.shape = add(self.shape,circle(l,0,r))
self.shape = add(self.shape,circle(-l,0,r))
#
# define board
#
width = 1.02 # board width
height = .87 # board height
x = 1 # x origin
y = 1 # y origin
zt = 0 # top z
zb = -0.06 # bottom z
w = .015 # wire width
rv = 0.016 # via size
rp = 0.03 # pad size
mask = .004 # solder mask size
pcb = PCB(x,y,width,height,mask)
IC1 = ATtiny44_SOICN('IC1\nt44')
V1 = via(zb,zt,rv,rp,'V1')
pcb = V1.add(pcb,IC1.pad[14].x+.08,IC1.pad[14].y+.02)
point(IC1.pad[7].x,J1.y+.02),
point(IC1.pad[7].x+.04,J1.y-.02),
point(J1.pad[4].x,J1.y-.02),
V2 = via(zb,zt,rv,rp,'V2')
pcb = V2.add(pcb,J1.pad[2].x+.075,J1.pad[2].y)
V3 = via(zb,zt,rv,rp,'V3')
pcb = V3.add(pcb,J1.pad[6].x-.075,J1.pad[6].y)
J2 = header_FTDI('J2 FTDI')
pcb = J2.add(pcb,x+width-.22,IC1.y-.0,angle=0)
point(IC1.pad[13].x+.105,IC1.pad[13].y),
point(IC1.pad[13].x+.105,J2.pad[4].y),
point(IC1.pad[12].x+.07,IC1.pad[12].y),
point(IC1.pad[12].x+.07,J2.pad[5].y+.04),
point(IC1.pad[12].x+.11,J2.pad[5].y),
V4 = via(zb,zt,rv,rp,'V4')
pcb = V4.add(pcb,J2.pad[3].x+.1,J2.pad[3].y)
pcb = XTAL1.add(pcb,IC1.pad[4].x-.2,IC1.pad[13].y+.003,angle=-90)
point(XTAL1.x+.12,IC1.pad[2].y),
point(XTAL1.x+.12,XTAL1.pad[1].y),
XTAL1.pad[1])
pcb = wire(pcb,w,
IC1.pad[3],
XTAL1.pad[3])
V5 = via(zb,zt,rv,rp,'V5')
pcb = V5.add(pcb,XTAL1.x-.12,XTAL1.y)
pcb = wire(pcb,w,
R1.pad[1],
IC1.pad[1])
pcb = wire(pcb,w,
R1.pad[2],
point(J1.pad[5].x,R1.y),
J1.pad[5])
V6 = via(zb,zt,rv,rp,'V6')
pcb = V6.add(pcb,R1.pad[1].x-.08,R1.y)
V7 = via(zb,zt,rv,rp,'V7')
pcb = V7.add(pcb,C1.pad[1].x-.025,C1.y-.06)
#
# select output
#
outputs = {}
if (output == "top, labels, and exterior"):
outputs["function"] = add(add(color(Tan,pcb.board),pcb.labels),
color(White,pcb.exterior))
outputs["layers"] = [zt]
elif (output == "top, labels, holes, and exterior"):
outputs["function"] = add(add(color(Tan,pcb.board),pcb.labels),
elif (output == "top, bottom, labels, and exterior"):
outputs["function"] = add(add(color(Tan,pcb.board),pcb.labels),
color(White,pcb.exterior))
outputs["layers"] = [zb,zt]
elif (output == "top, bottom, labels, holes, and exterior"):
outputs["function"] = add(add(color(Tan,pcb.board),pcb.labels),
add(color(White,pcb.exterior),color(Blue,pcb.holes)))
outputs["layers"] = [zb,zt]
elif (output == "top traces"):
outputs["function"] = color(White,pcb.board)
outputs["layers"] = [zt]
elif (output == "top traces and exterior"):
outputs["function"] = color(White,add(pcb.board,pcb.exterior))
outputs["layers"] = [zt]
elif (output == "bottom traces reversed"):
outputs["function"] = color(White,
reflect_x(pcb.board,2*x+width))
outputs["layers"] = [zb]
elif (output == "bottom traces reversed and exterior"):
outputs["function"] = color(White,
reflect_x(add(pcb.board,pcb.exterior),2*x+width))
outputs["layers"] = [zb]
elif (output == "interior"):
outputs["function"] = color(White,pcb.interior)
elif (output == "exterior"):
outputs["function"] = color(White,pcb.exterior)
outputs["function"] = color(White,
subtract(add(pcb.exterior,pcb.interior),pcb.holes))
outputs["layers"] = [zb]
elif (output == "holes and interior"):
outputs["function"] = color(White,
subtract(pcb.interior,pcb.holes))
outputs["layers"] = [zb]
elif (output == "solder mask"):
outputs["function"] = color(White,pcb.mask)
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else:
print("oops -- don't recognize output")
#
# set limits and parameters
#
border = 0.05
outputs["xmin"] = x-border # min x to render
outputs["xmax"] = x+width+border # max x to render
outputs["ymin"] = y-border # min y to render
outputs["ymax"] = y+height+border # max y to render
outputs["mm_per_unit"] = 25.4 # use inch units
outputs["type"] = "RGB" # use RGB color
#
# send output
#
json.dump(outputs,sys.stdout)